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Successfully used in the system low dropout voltage regulator
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Low dropout regulator (LDO) to a wide range of load current and input voltage to maintain the specified output voltage, and the difference between the input and output voltage can be very small. This voltage difference is called voltage drop, or margin requirements, the load current of 2A can be as low as 80mV. Adjustable Output Low Dropout Voltage Regulator first introduced in 1977. Now, portable devices need to use low dropout linear regulators are often up to 20. Many of the latest portable devices LDO is integrated into the multi-function power management IC (PMIC) - This is a highly integrated system, with 20 or more power domains, one for audio, battery charging, device management, lighting, communication and other functions. However, with the rapid development of portable systems, integrated PMIC has been unable to meet the power requirements of peripherals. In the later stages of system development must be increased to give a variety of special options LDO power supply, such as camera modules, Bluetooth, WiFi and other connectivity modules. Used to help reduce noise LDO can solve by electromagnetic interference (EMI) and printed circuit board (PCB) layout problems caused by the regulators, and by turning off unnecessary features to improve system efficiency. This article will discuss basic LDO topology, the key performance indicators to explain and demonstrate low dropout regulator in the system. ADI company using both the design of LDO product family features examples illustrate. Basic LDO architecture. LDO from the reference voltage, error amplifier, the feedback divider and the transmission transistors, shown in Figure 1. Output current through the transmission device is provided. Transmission device is controlled by the error amplifier gate voltage - the voltage reference and error amplifier compares the feedback voltage, and then enlarge the difference between the two in order to reduce the error voltage. If the feedback voltage is below the reference voltage, the transistor's gate voltage will be low, allowing more current to flow, thereby increasing the output voltage. If the feedback voltage is higher than the reference voltage, the transistor's gate voltage is pulled high, thus limiting the current flow, reducing the output voltage. The dynamic characteristics of closed-loop system based on two main poles, one is from the error amplifier / transistor formed within the pole and the other is from the amplifier output impedance and output capacitor equivalent series resistance (ESR) components of the external pole . Output capacitor and its ESR will affect the loop stability and transient response to load current performance. To ensure stability, recommended or below 1Ω ESR values. In addition, LDO requires the use of input and output capacitors to filter out the noise and control the load transient changes. The larger capacitor, LDO's transient response is better, but will extend the start time. LDO ADI's capacitance can be provided in the use of the specified operating conditions to achieve good stability.